SP5 socket: CPUs, chipsets and cooler fit

SP5 is AMD's large server socket for the EPYC 9004 Genoa and EPYC 9005 Turin families. It is a land grid array socket with 6,096 contacts, and the processor package measures 72 × 75.4 mm. AMD launched it in November 2022 with Genoa, added Bergamo in 2023, and kept the same socket for Turin in 2024 with embedded Turin following in March 2025.

Quick facts

MakerAMD
Package typeLGA
Contacts6,096
Package size72 × 75.4 mm
IntroducedNovember 2022
StatusCurrent
MemoryDDR5 ECC RDIMM, 12 channels (up to DDR5-6000, DDR5-6400 in target configs, up to 6 TB per socket)
PCIe from the CPU128 PCIe 5.0 lanes plus 8 PCIe 3.0 lanes per socket, with CXL 2.0 on Turin
Cooler mounting holesBoard specific (server heatsink)
ReplacesSP3
Replaced bySP7

Overview

The socket feeds 12 channels of DDR5 ECC memory and 128 lanes of PCIe 5.0 per socket, plus 8 lanes of PCIe 3.0 for board devices and CXL 2.0 for memory expansion. That I/O budget suits dual-socket racks, storage servers, and network appliances where memory bandwidth and lane count decide throughput. Peak socket power reaches 700 W for short bursts, with production SKUs from 125 W to 500 W in this batch.

Turin keeps the socket and raises core density with Zen 5 and Zen 5c chiplets, from 8-core edge parts to 192-core dense parts. A Genoa board can take a Turin chip of the same power class after a BIOS update from the board maker, which makes SP5 a genuine upgrade path in the rack. P-suffix models stay single-socket only, while non-P models run in one-socket or two-socket boards where listed.

Processor generations

CodenameMarketing nameYearsNotes
GenoaEPYC 9004 series2022 to 2023Zen 4 server processors from 16 to 96 cores, launched in November 2022 on SP5 with 12-channel DDR5 and PCIe 5.0.
Genoa-XEPYC 9004X series with 3D V-Cache2023Zen 4 server processors with stacked L3 to 1152 MB for HPC and simulation, including 16-core 9184X, 32-core 9384X and 96-core 9684X on SP5. Shares DDR5 and PCIe 5.0 platform with Genoa, so board support follows the maker list.
BergamoEPYC 9704 series2023Zen 4c cloud processors with up to 128 small cores on SP5, launched in June 2023 for dense scale-out racks.
TurinEPYC 9005 series2024 to 2025Zen 5 and Zen 5c server processors from 8 to 192 cores, including the 15 Embedded models in this batch. Launched in October 2024 for servers and in March 2025 for embedded, on the same SP5 socket as Genoa.

Memory layout

Each SP5 socket feeds 12 DDR5 channels with ECC RDIMM or 3DS RDIMM modules, rated to 6000 MT/s with 6400 MT/s in target configs, for up to 6 TB per socket. Twelve channels at these rates keep 96-core and 128-core parts supplied in virtualization, database and firewall mixes. Population order and maximum capacity vary by board, so the vendor memory list governs every build. Embedded designs use the same 12-channel layout with a 7-year manufacturing window and long-life firmware.

A Turin chip in a Genoa board may run memory at the older qualified speed until the vendor requalifies the board. Check the vendor list for exact DIMM speeds per BIOS before mixing generations, and match DIMM type across both sockets in a 2P build.

PCIe and CXL

SP5 exposes 128 lanes of PCIe 5.0 per socket for graphics, NVMe storage, networking and accelerators, plus 8 lanes of PCIe 3.0 for board devices. CXL 2.0 runs on four x16 links for memory expansion where the board wires it. That lane budget feeds all-flash arrays, 100-gigabit and faster networking, and timing cards without lane sharing pressure.

Lane bifurcation and CXL behavior follow board firmware, so architects confirm slot maps before committing to a storage-heavy layout. Single-socket P models keep topologies simple with no inter-socket link to tune, while dual-socket builds add Infinity Fabric between the two SP5 sockets.

Power and cooling

SP5 parts in this batch span 125 W to 500 W of default TDP, all with vendor-qualified air or liquid cooling per TDP class. The 8-core 9015 starts at 125 W while the 192-core 9965 tops the range at 500 W. Power delivery and chassis airflow must cover the chosen class, and firmware power limits can cap draw below default where a cabinet demands it, at some cost in sustained clocks.

Because P models are single-socket only, scaling out means more nodes rather than bigger nodes for those SKUs. Non-P models scale up to two sockets per board with identical part numbers in both sockets. Match the processor to the board qualified list for power class, BIOS level and heatsink kit.

CPUs on SP5

77 processor pages in the database, newest first.

ProcessorCores / threadsBase / boostTDPLaunched
AMD EPYC Embedded 90158 / 163.6 / 4.1 GHz125 WMar 2025
AMD EPYC Embedded 913516 / 323.65 / 4.3 GHz200 WMar 2025
AMD EPYC Embedded 925524 / 483.2 / 4.3 GHz200 WMar 2025
AMD EPYC Embedded 935532 / 643.55 / 4.4 GHz280 WMar 2025
AMD EPYC Embedded 9355P32 / 643.55 / 4.4 GHz280 WMar 2025
AMD EPYC Embedded 945548 / 963.15 / 4.4 GHz300 WMar 2025
AMD EPYC Embedded 9455P48 / 963.15 / 4.4 GHz300 WMar 2025
AMD EPYC Embedded 953564 / 1282.4 / 4.3 GHz300 WMar 2025
AMD EPYC Embedded 955564 / 1283.2 / 4.4 GHz360 WMar 2025
AMD EPYC Embedded 9555P64 / 1283.2 / 4.4 GHz360 WMar 2025
AMD EPYC Embedded 965596 / 1922.6 / 4.5 GHz400 WMar 2025
AMD EPYC Embedded 9655P96 / 1922.6 / 4.5 GHz400 WMar 2025
AMD EPYC Embedded 9745128 / 2562.4 / 3.7 GHz400 WMar 2025
AMD EPYC Embedded 9755128 / 2562.7 / 4.1 GHz500 WMar 2025
AMD EPYC Embedded 9845160 / 3202.1 / 3.7 GHz390 WMar 2025
AMD EPYC Embedded 9965192 / 3842.25 / 3.7 GHz500 WMar 2025
AMD EPYC 90158 / 163.6 / 4.1 GHz125 WOct 2024
AMD EPYC 911516 / 322.6 / 4.1 GHz125 WOct 2024
AMD EPYC 913516 / 323.65 / 4.3 GHz200 WOct 2024
AMD EPYC 9175F16 / 324.2 / 5.0 GHz320 WOct 2024
AMD EPYC 925524 / 483.2 / 4.3 GHz200 WOct 2024
AMD EPYC 9275F24 / 484.1 / 4.8 GHz320 WOct 2024
AMD EPYC 933532 / 643.0 / 4.4 GHz210 WOct 2024
AMD EPYC 935532 / 643.55 / 4.4 GHz280 WOct 2024
AMD EPYC 9355P32 / 643.55 / 4.4 GHz280 WOct 2024
AMD EPYC 936536 / 723.4 / 4.3 GHz300 WOct 2024
AMD EPYC 9375F32 / 643.8 / 4.8 GHz320 WOct 2024
AMD EPYC 945548 / 963.15 / 4.4 GHz300 WOct 2024
AMD EPYC 9455P48 / 963.15 / 4.4 GHz300 WOct 2024
AMD EPYC 9475F48 / 963.65 / 4.8 GHz400 WOct 2024
AMD EPYC 953564 / 1282.4 / 4.3 GHz300 WOct 2024
AMD EPYC 955564 / 1283.2 / 4.4 GHz360 WOct 2024
AMD EPYC 9555P64 / 1283.2 / 4.4 GHz360 WOct 2024
AMD EPYC 956572 / 1443.15 / 4.3 GHz400 WOct 2024
AMD EPYC 9575F64 / 1283.3 / 5.0 GHz400 WOct 2024
AMD EPYC 964596 / 1922.3 / 3.7 GHz320 WOct 2024
AMD EPYC 965596 / 1922.6 / 4.5 GHz400 WOct 2024
AMD EPYC 9655P96 / 1922.6 / 4.5 GHz400 WOct 2024
AMD EPYC 9745128 / 2562.4 / 3.7 GHz400 WOct 2024
AMD EPYC 9755128 / 2562.7 / 4.1 GHz500 WOct 2024
AMD EPYC 9825144 / 2882.2 / 3.7 GHz390 WOct 2024
AMD EPYC 9845160 / 3202.1 / 3.7 GHz390 WOct 2024
AMD EPYC 9965192 / 3842.25 / 3.7 GHz500 WOct 2024
AMD EPYC 9184X16 / 323.55 / 4.2 GHz320 WJun 2023
AMD EPYC 9384X32 / 643.1 / 3.9 GHz320 WJun 2023
AMD EPYC 9684X96 / 1922.55 / 3.7 GHz400 WJun 2023
AMD EPYC 9734112 / 2242.2 / 3.0 GHz340 WJun 2023
AMD EPYC 9754128 / 2562.25 / 3.1 GHz360 WJun 2023
AMD EPYC 9754S128 / 1282.25 / 3.1 GHz360 WJun 2023
AMD EPYC Embedded 912416 / 323.0 / 3.7 GHz200 WMar 2023
AMD EPYC Embedded 925424 / 482.9 / 4.15 GHz200 WMar 2023
AMD EPYC Embedded 935432 / 643.25 / 3.8 GHz280 WMar 2023
AMD EPYC Embedded 9354P32 / 643.25 / 3.8 GHz280 WMar 2023
AMD EPYC Embedded 945448 / 962.75 / 3.8 GHz290 WMar 2023
AMD EPYC Embedded 9454P48 / 962.75 / 3.8 GHz290 WMar 2023
AMD EPYC Embedded 955464 / 1283.1 / 3.75 GHz360 WMar 2023
AMD EPYC Embedded 9554P64 / 1283.1 / 3.75 GHz360 WMar 2023
AMD EPYC Embedded 965496 / 1922.4 / 3.7 GHz360 WMar 2023
AMD EPYC Embedded 9654P96 / 1922.4 / 3.7 GHz360 WMar 2023
AMD EPYC 912416 / 323.0 / 3.7 GHz200 WNov 2022
AMD EPYC 9174F16 / 324.1 / 4.4 GHz320 WNov 2022
AMD EPYC 922424 / 482.5 / 3.7 GHz200 WNov 2022
AMD EPYC 925424 / 482.9 / 4.15 GHz200 WNov 2022
AMD EPYC 9274F24 / 484.05 / 4.3 GHz320 WNov 2022
AMD EPYC 933432 / 642.7 / 3.9 GHz210 WNov 2022
AMD EPYC 935432 / 643.25 / 3.8 GHz280 WNov 2022
AMD EPYC 9354P32 / 643.25 / 3.8 GHz280 WNov 2022
AMD EPYC 9374F32 / 643.85 / 4.3 GHz320 WNov 2022
AMD EPYC 945448 / 962.75 / 3.8 GHz290 WNov 2022
AMD EPYC 9454P48 / 962.75 / 3.8 GHz290 WNov 2022
AMD EPYC 9474F48 / 963.6 / 4.1 GHz360 WNov 2022
AMD EPYC 953464 / 1282.45 / 3.7 GHz280 WNov 2022
AMD EPYC 955464 / 1283.1 / 3.75 GHz360 WNov 2022
AMD EPYC 9554P64 / 1283.1 / 3.75 GHz360 WNov 2022
AMD EPYC 963484 / 1682.25 / 3.7 GHz290 WNov 2022
AMD EPYC 965496 / 1922.4 / 3.7 GHz360 WNov 2022
AMD EPYC 9654P96 / 1922.4 / 3.7 GHz360 WNov 2022

Frequently asked questions

Which processors fit SP5?

EPYC 9004 Genoa and Bergamo plus EPYC 9005 Turin, including the EPYC Embedded 9005 series in this batch. Genoa covers 16 to 96 cores, Bergamo covers up to 128 small cores, and Turin covers 8 to 192 cores. SP3, SP6, SP7 and SP8 parts do not fit.

Does SP5 support two sockets?

Yes. Boards support one or two sockets, except P-suffix models which are validated for single-socket boards only. A non-P Turin or Genoa can run in a 1P or 2P board where the vendor lists it, while a 9655P or 9455P stays on 1P boards.

Do Turin CPUs work in Genoa boards?

Yes, where the board maker lists Turin support. Turin uses the same SP5 socket and packaging as Genoa, so many Genoa boards take Turin after a BIOS update. Memory speed may stay at the board qualified limit, and power delivery must cover the new TDP class.

What memory does SP5 use?

DDR5 ECC RDIMM and 3DS RDIMM in 12 channels, rated to DDR5-6000 with DDR5-6400 in target configs, for up to 6 TB per socket. The board vendor qualifies exact DIMM types, speeds and population rules.

Sources and verification

  1. Socket SP5 (Wikipedia)
  2. AMD EPYC 9005 Series Processor Datasheet (clocks, cache, TDP, memory, PCIe)
  3. AMD EPYC 9005 Processor Architecture Overview (SP5, 12-channel DDR5, PCIe Gen5, CXL)
  4. AMD SP5 Socket LGA6096 for EPYC Genoa Pictured (VideoCardz)

Facts last checked against these sources on . Page last edited on .