AMD EPYC Embedded 9555 socket: SP5

The AMD EPYC Embedded 9555 uses SP5, the 6,096-contact server socket for EPYC 9004 and 9005 families. It is a 64-core 128-thread Zen 5 embedded processor with a 360 W default TDP for virtualization and storage nodes.

Socket
SP5
Launched
March 2025
Cores and threads
64 and 128
Default TDP
360 W
Codename
Turin
Segment
Embedded
Family
AMD EPYC
Clocks
3.2 / 4.4 GHz

AMD EPYC Embedded 9555 specifications

Cores64
Threads128
Core architectureZen 5
Clocks3.2 GHz base to 4.4 GHz boost
Cache256 MB L3
Default TDP360 W
Manufacturing process4 nm
Memory supportDDR5-6000 ECC RDIMM, 12 channels, up to 6 TB per socket
PCI ExpressPCIe 5.0 x128 plus PCIe 3.0 x8 per socket, with CXL 2.0
ECC memoryECC through DDR5 RDIMM
PackageSP5 (LGA6096)
Sockets supported1P and 2P

Motherboard compatibility

AMD EPYC Embedded 9555 needs a motherboard with a SP5 socket. Chipset by chipset data for this codename is not recorded yet. See the SP5 chipset list and the board maker's CPU support list.

SP5 at a glance

TypeLGA, 6,096 contacts
Package size72 × 75.4 mm
IntroducedNovember 2022
MemoryDDR5 ECC RDIMM, 12 channels (up to DDR5-6000, DDR5-6400 in target configs, up to 6 TB per socket)
Cooler mounting holesBoard specific (server heatsink)

Read the full SP5 socket guide

What the AMD EPYC Embedded 9555 is

The AMD EPYC Embedded 9555 is the higher-clock 64-core member of the EPYC Embedded 9005 Turin stack on Socket SP5. It runs 128 threads at 3.2 GHz base with boost to 4.4 GHz, backed by 256 MB of L3 cache and a 360 W default TDP. AMD announced the Embedded 9005 series on March 11, 2025 with production shipments expected in the second quarter of 2025, building the Zen 5 chiplets on a 4 nm process with a 6 nm I/O die.

Sixty-four cores at 3.2 GHz base suit virtualization hosts, database nodes, content platforms and network services that need both core count and frequency. Higher base clocks than the efficiency-tuned 9535 keep latency-sensitive threads moving, while 128 threads cover consolidation. The 256 MB L3 pool keeps virtual machine and container working sets near the cores.

Against the 64-core AMD EPYC Embedded 9535 beside it, the 9555 adds 800 MHz of base clock for frequency-sensitive mixes at a higher 360 W class. Against the 96-core AMD EPYC Embedded 9655 above it, the 9555 keeps a lower power envelope for standard air-cooled racks. Long-life firmware and 7-year manufacturing support suit carrier qualification. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

Socket and motherboard compatibility

The 9555 fits Socket SP5, a 6,096-contact land grid array that AMD built for EPYC 9004 Genoa and EPYC 9005 Turin processors. Boards support one or two sockets with this non-P part, so one 9555 fills a virtualization appliance or pairs with an identical 9555 in a dual-socket node. SP5 boards are platform designs rather than desktop chipsets, so memory lists, heatsink kits and firmware all come from the board vendor.

Turin shares SP5 packaging with Genoa, so many Genoa boards take the 9555 after a BIOS update from the board maker at the same power class. A 9555 at 360 W needs power delivery and cooling rated for that class, which upper-midrange Genoa boards already provide. Memory on an older board may stay at the Genoa qualified speed rather than reaching DDR5-6000, so the vendor memory list governs the exact result. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each SP5 socket feeds 12 DDR5 channels with ECC RDIMM or 3DS RDIMM modules, and AMD rates Turin to 6000 MT/s with 6400 MT/s in target configs for up to 6 TB per socket. Twelve channels keep 128 threads supplied in virtualization, database and content mixes. Population order and maximum capacity vary by board, so the vendor memory list governs every build, and dual-socket builds use matched DIMM populations.

PCI Express connectivity is Gen 5 with x128 lanes per socket, plus x8 Gen 3 lanes for board devices and slower slots. That lane budget feeds NVMe arrays, high-speed networking and accelerators without lane sharing pressure. CXL 2.0 memory expansion is part of the Turin platform where the board wires it, and bifurcation follows board firmware, so architects confirm slot maps before committing to a consolidation layout.

Cooling follows the board vendor list rather than a retail box. SP5 uses server retention with heatsinks validated per TDP class, and the 9555 at 360 W needs a heatsink kit rated for that class in the intended chassis airflow. No cooler ships with the processor. Firmware power limits can cap draw below the default where a site demands it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the path up from the 9555 starts with the 96-core AMD EPYC Embedded 9655 for more cores on SP5 boards where power and cooling allow. The 128-core AMD EPYC Embedded 9755 follows for dense consolidation at 500 W. Each move keeps board and memory investments where the TDP class allows, plus a BIOS that already supports Turin.

The side move to the single-socket AMD EPYC Embedded 9555P keeps the same 64 cores and clocks on 1P-only boards with simpler firmware. The step down to the efficiency-tuned AMD EPYC Embedded 9535 trims power to 300 W for cooler racks. A move to AM5 entry servers is a different platform with 2 memory channels. That change replaces board, memory and cooling from scratch.

Frequently asked questions

What socket does the AMD EPYC Embedded 9555 use?

Socket SP5 (LGA6096), the large server socket for EPYC 9004 Genoa and EPYC 9005 Turin with 12 DDR5 channels and PCIe 5.0 x128 per socket.

What is the difference between the 9555 and the 9555P?

No P suffix means the part is validated for one-socket and two-socket boards where the vendor lists it. The P twin AMD EPYC Embedded 9555P shares clocks and cache but stays on single-socket boards only.

What memory does the EPYC Embedded 9555 need?

DDR5 ECC RDIMM across 12 channels, rated to 6000 MT/s with 6400 MT/s in target configs, for up to 6 TB per socket. The board vendor qualifies exact DIMM types, speeds and population rules.

Does the 9555 work in existing Genoa boards?

Yes, where the board maker lists Turin support at 360 W. Many 360 W Genoa boards take the 9555 after a BIOS update. Confirm the CPU list and cooling class before swapping.

Sources and verification

  1. AMD EPYC Embedded 9005 Series Processors (SP5, Zen 5 and Zen 5c, 7-year support)
  2. AMD Unveils 5th Gen EPYC Embedded Processors (March 11, 2025, SP5, sampling and Q2 production)
  3. AMD EPYC 9005 Series Processor Datasheet (per-SKU base, boost, L3, TDP, memory, PCIe)
  4. AMD EPYC Embedded 9005 Series for edge markets (12 DDR5 channels, 160 PCIe Gen5 lanes)

Facts last checked against these sources on . Page last edited on .