AMD EPYC Embedded 9355 socket: SP5

What the AMD EPYC Embedded 9355 is

The AMD EPYC Embedded 9355 is the 32-core dual-socket-capable member of the EPYC Embedded 9005 Turin stack on Socket SP5. It runs 64 threads at 3.55 GHz base with boost to 4.4 GHz, backed by 256 MB of L3 cache and a 280 W default TDP. AMD announced the Embedded 9005 series on March 11, 2025 with production shipments expected in the second quarter of 2025, building the Zen 5 chiplets on a 4 nm process with a 6 nm I/O die.

Thirty-two high-clock cores suit storage controllers, hyperconverged nodes, branch virtualization hosts and industrial servers that run mixed workloads on one or two sockets. Base clocks near 3.5 GHz keep interactive and control plane threads snappy, while 64 threads per socket absorb bursts. The 256 MB L3 pool keeps data sets near the cores across 12 memory channels.

Against the single-socket AMD EPYC Embedded 9355P twin, the 9355 adds the dual-socket option with identical clocks for racks that scale by adding a second processor. Against the 48-core AMD EPYC Embedded 9455P above it, the 9355 keeps higher base clocks at a lower 280 W class. Long-life firmware and 7-year manufacturing support suit qualified platforms. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

Socket and motherboard compatibility

The 9355 fits Socket SP5, a 6,096-contact land grid array that AMD built for EPYC 9004 Genoa and EPYC 9005 Turin processors. Boards support one or two sockets with this non-P part, so one 9355 fills a storage appliance or pairs with an identical 9355 in a dual-socket node. SP5 boards are platform designs rather than desktop chipsets, so memory lists, heatsink kits and firmware all come from the board vendor.

Turin shares SP5 packaging with Genoa, so many Genoa boards take the 9355 after a BIOS update from the board maker at the same power class. A 9355 at 280 W fits boards already rated for 280 W Genoa parts, which keeps thermals and power delivery inside known limits. Memory on an older board may stay at the Genoa qualified speed rather than reaching DDR5-6000, so the vendor memory list governs the exact result. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each SP5 socket feeds 12 DDR5 channels with ECC RDIMM or 3DS RDIMM modules, and AMD rates Turin to 6000 MT/s with 6400 MT/s in target configs for up to 6 TB per socket. Twelve channels keep 64 threads per socket supplied in storage, file serving and firewall mixes. Population order and maximum capacity vary by board, so the vendor memory list governs every build, and dual-socket builds use matched DIMM populations.

PCI Express connectivity is Gen 5 with x128 lanes per socket, plus x8 Gen 3 lanes for board devices and slower slots. That lane budget feeds all-flash shelves, 25 and 100-gigabit networking and host bus adapters without lane sharing pressure. CXL 2.0 memory expansion is part of the Turin platform where the board wires it, and bifurcation follows board firmware, so architects confirm slot maps before committing to an array-heavy layout.

Cooling follows the board vendor list rather than a retail box. SP5 uses server retention with heatsinks validated per TDP class, and the 9355 at 280 W needs a heatsink kit rated for that class in the intended chassis airflow. No cooler ships with the processor. Firmware power limits can cap draw below the default where a compact chassis demands it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the path up from the 9355 starts with the 48-core AMD EPYC Embedded 9455P and the 64-core AMD EPYC Embedded 9535, all staying on SP5 boards where power and cooling allow. The 64-core AMD EPYC Embedded 9555 follows for denser virtualization on the same board family. Each move keeps board and memory investments where the TDP class allows, plus a BIOS that already supports Turin.

The side move to the single-socket AMD EPYC Embedded 9355P keeps the same 32 cores and clocks on 1P-only boards with simpler firmware. A move to AM5 entry servers is a different platform with 2 memory channels and lower power classes. That change replaces board, memory population and cooling design from scratch. The choice turns on single-socket simplicity against dual-socket headroom.