AMD EPYC 7502 socket: SP3
The AMD EPYC 7502 uses SP3, the LGA socket for EPYC server processors. The 32-core chip at 180 W is the mainstream 32-core Rome part.
AMD EPYC 7502 specifications
| Cores | 32 |
|---|---|
| Threads | 64 |
| Core architecture | Zen 2 (Rome) |
| Clocks | 2.5 GHz base, up to 3.35 GHz boost |
| Cache | 16 MB L2 plus 128 MB L3 |
| Default TDP | 180 W |
| Manufacturing process | TSMC 7 nm FinFET |
| Memory support | DDR4-3200 ECC, 8 channels |
| PCI Express | 128 PCIe Gen4 lanes per socket, up to 160 in 2P |
| Integrated graphics | None (BMC graphics on board) |
| Multiplier | Locked |
| ECC memory | Supported, DDR4 ECC RDIMM |
| Package | SP3 LGA4094 |
| Cooler in the box | None, server heatsink required |
Motherboard compatibility
AMD EPYC 7502 needs a motherboard with a SP3 socket. Chipset by chipset data for this codename is not recorded yet. See the SP3 chipset list and the board maker's CPU support list.
SP3 at a glance
| Type | LGA, 4,094 contacts |
|---|---|
| Package size | 58.5 × 75.4 mm |
| Introduced | June 2017 |
| Memory | DDR4 ECC RDIMM, 8 channels to DDR4-3200, up to 4 TB per socket |
| Cooler mounting holes | Board specific (server heatsink) |
What the EPYC 7502 is
The EPYC 7502 is a 32-core, 64-thread server processor from Rome. It launched in August 2019 as the mainstream 32-core option with a 2.5 GHz base and up to 3.35 GHz boost at 180 W. Four chiplets of eight cores share 128 MB of L3.
The 2.5 GHz base balances throughput and responsiveness for general clouds. Sixteen megabytes of L2 back dense container fleets. The 180 W envelope fits standard high airflow chassis without exotic cooling.
Dual socket scaling reaches 64 cores per box for mainstream regions. The 7502 sits between the efficient 7452 and the high clock 7542 on price and power. Its single socket twin 7502P serves identical clocks in 1P boards.
Socket and motherboard compatibility
The EPYC 7502 fits SP3 on single and dual socket boards with 180 W delivery. Vendor qualification covers thermals at this band. Rome firmware posts it natively.
Mainstream dual socket pairs total 64 cores for cloud regions. Heatsinked power stages hold sustained boost. The How to find your CPU socket type guide explains server sockets.
Milan 32-core parts later dropped into these boards with BIOS updates for IPC gains.
Memory, PCIe and cooling
Eight channels of DDR4-3200 ECC move data at up to 204.8 GB per sec. A terabyte of RAM pairs naturally with 32 cores for VM density. ECC corrects errors during long uptimes.
PCIe Gen4 lanes total 128 per socket for NVMe and 100 Gb networking. Mainstream clouds attach flash pools without switches. Dual socket builds reach 160 lanes.
The 180 W heatsink class needs high flow 1U or relaxed 2U cooling. No boxed cooler exists. Cool inlets preserve boost best.
Where this Rome part fits
Thirty two mainstream cores fit virtual private servers, analytics and mid size HPC. The balance of base clocks, cache and watts covers general enterprise work. The 128 MB L3 absorbs shared working sets.
Cloud regions standardize on dual socket 7502 pairs with a terabyte of RAM. All eight channels filled matters for analytics throughput. The AMD EPYC 7452 trims power nearby for throughput billing.
Buyers confirm power delivery and firmware with the vendor before dense rollouts.
Upgrade paths
On SP3 clocks grow to the 225 W 7542 on the same boards, or density grows to 48-core 7552. Milan 32-core SKUs follow with firmware.
SP5 Genoa servers bring DDR5 for next generation density. The CPU cooler compatibility by socket guide details cooling bands.
Frequently asked questions
What socket does the AMD EPYC 7502 use?
It uses SP3 on single and dual socket server boards.
How many cores does the EPYC 7502 have?
32 cores with 64 threads at 2.5 GHz base and up to 3.35 GHz boost.
How is the 7502 different from the 7502P?
Same silicon and clocks; the 7502 scales to two sockets while the P stays single socket.
What memory does the EPYC 7502 use?
DDR4-3200 ECC RDIMM in 8 channels.
What is the TDP of the EPYC 7502?
180 W with server cooling required.
When did the EPYC 7502 launch?
August 2019 with the Rome stack.
Sources and verification
Facts last checked against these sources on . Page last edited on .