Intel Xeon MP 7040 Dual-Core socket: Socket 604

What the Xeon MP 7040 Dual-Core is

The Intel Xeon MP 7040 Dual-Core is a 3.0 GHz dual-core multiprocessor server processor from December 2005. Two NetBurst cores run at 3.0 GHz through an 18x multiplier on a 667 MT/s front side bus. Hyper-Threading is documented for every Paxville MP model, so the package presents 4 threads. The sSpec is SL8UC on stepping A0 with order number NE80560KF0804MH, built on a 90 nm process in a 604-pin package for Socket 604.

Cache is 2 MB of L2 per core, or 2x2 MB across the package, with no L3 on the die. Wikipedia records this layout with the 667 MT/s bus and the 18x multiplier for SL8UC. Intel's November 2005 launch release describes the 7040 in identical terms: 3.0 GHz with 2x2 MB of L2 on a 667 MHz bus, shipping in the 7000 sequence for E8500 chipset platforms. TechPowerUp agrees on the frequency, multiplier, bus clock, 135 W envelope, and December 2005 date.

The 7040 is the capacity option of the 3.0 GHz pair. Against the 7041 it trades bus speed for the same clocks and cache, running its 667 MT/s bus where the 7041 runs 800 MT/s. Both share the 135 W envelope and the locked multiplier, so the choice between them is a board and chipset question rather than a power question. ECC memory support through the board rounds out a part aimed at large shared memory multiprocessor systems.

Socket and motherboard compatibility

Socket 604 is the mechanical home: the 604-pin mPGA604 zero insertion force socket. The MP designation sets the board class at four sockets and beyond, the quad and octo topology Wikipedia records for Paxville MP. Dual-socket DP boards are qualified separately even though the socket is shared.

Intel stated the 7000 sequence fits existing E8500 chipset platforms built for dual-core operation. The board CPU list must still name the 7040 or sSpec SL8UC, the BIOS must include its microcode, and regulation plus cooling must be rated for 135 W. A board that lists only the 667 MT/s 7020 may need a BIOS revision before it accepts this faster bin. The Socket vs chipset: what decides whether a CPU works guide covers how socket, chipset, and BIOS revision interact.

Used system checks follow the familiar order: sSpec on the package against the board list, BIOS revision, then chassis airflow for a fully populated 135 W multiprocessor layout.

Memory, PCIe and cooling

Memory travels through the server board, and TechPowerUp records ECC support with a dual-channel board memory bus for this SKU. Type, speed, rank rules, slot order, and the capacity ceiling come from the server maker memory list for the exact board. On four socket boards the population sequence in the manual is not optional; deviating from it can halve available bandwidth or prevent boot.

A 667 MT/s front side bus connects the package to the server chipset, and all expansion slots descend from that chipset. There is no integrated graphics and no on-die PCIe controller, so slot versions and console behavior are board facts. Administration on these systems normally runs through board management hardware.

Cooling follows the 135 W envelope with vendor heatsinks specified for the exact board and chassis. Directed airflow per the board manual is assumed by the thermal design, and a fully populated multiprocessor chassis leaves no room for generic or undersized thermal parts.

Upgrade paths

The bus speed alternative at the same 3.0 GHz is the Intel Xeon MP 7041 Dual-Core, which doubles L2 per core the same way but runs an 800 MT/s bus for boards and chipsets that support it. Slower same-socket options are the Intel Xeon MP 7030 Dual-Core at 2.8 GHz and the Intel Xeon MP 7020 Dual-Core at 2.667 GHz. All need their own board list entries and BIOS coverage.

The later same-socket family is 65 nm Tulsa, for example the Intel Xeon 7140M, where the board vendor qualifies it. Any platform past Socket 604 needs a new board, new memory, and a new thermal plan.