Intel Xeon MP 7020 Dual-Core socket: Socket 604
The Intel Xeon MP 7020 Dual-Core uses Socket 604 in multiprocessor server boards built for Paxville MP parts. It is a dual-core chip at 2.667 GHz with Hyper-Threading, 1 MB of L2 cache per core, a 667 MT/s bus, and a 135 W envelope.
- Socket
- Socket 604
- Launched
- December 2005
- Cores and threads
- 2 and 4
- Base power
- 135 W
- Codename
- Paxville
- Segment
- Server
- Family
- Intel Xeon MP
- Clocks
- 2.67 GHz
Intel Xeon MP 7020 Dual-Core specifications
| Cores | 2 |
|---|---|
| Threads | 4 (Hyper-Threading, 2 per core) |
| Core architecture | Paxville cores on 90 nm |
| Clocks | 2.667 GHz at 16x multiplier (no turbo) |
| Cache | 2x1 MB L2 (1 MB per core) |
| Processor base power (TDP) | 135 W |
| Manufacturing process | 90 nm |
| Memory support | ECC through the server board |
| Front side bus | 667 MT/s |
| PCI Express | Expansion from the board chipset |
| Integrated graphics | None |
| Multiplier | Locked |
| Package | Socket 604 (604-pin) |
| ECC memory | Yes |
| Memory channels | Dual-channel through the server board |
Motherboard compatibility
Intel Xeon MP 7020 Dual-Core needs a motherboard with a Socket 604 socket. Chipset by chipset data for this codename is not recorded yet. See the Socket 604 chipset list and the board maker's CPU support list.
Socket 604 at a glance
| Type | PGA, 604 contacts |
|---|---|
| Package size | n/a |
| Introduced | 2002 |
| Memory | DDR2 memory through the Caneland board chipset |
| Cooler mounting holes | Board specific (server heatsink) |
What the Xeon MP 7020 Dual-Core is
The Intel Xeon MP 7020 Dual-Core is the entry dual-core processor in the Paxville MP multiprocessor line. Two NetBurst cores run at 2.667 GHz through a 16x multiplier on a 667 MT/s front side bus. Hyper-Threading is documented for all Paxville MP models, so the two cores present 4 threads. The sSpec is SL8UA on stepping A0 with order number NE80560KF0672MH, and the die is 90 nm in a 604-pin package for Socket 604.
Cache is 1 MB of L2 per core, written 2x1 MB across the package, with no L3 on the die. Wikipedia records this layout with the 667 MT/s bus, the 16x multiplier, and sSpec SL8UA. Intel's November 2005 launch release describes the 7020 as 2.66 GHz with 2x1 MB of L2 on a 667 MHz bus, shipping in the 7000 sequence for E8500 chipset platforms. The entry clock makes it the lowest frequency Paxville MP part, aimed at four socket throughput per watt rather than per-core speed.
Power and date both carry disagreements that this page resolves explicitly. Wikipedia prints 165 W with a November 1, 2005 date for SL8UA, while the per-SKU TechPowerUp entry gives 135 W with a December 1, 2005 date. Intel's own release confirms the sequence was shipping on November 1, 2005, so November dates describe the sequence launch and December 1 is the per-SKU database date used here. On power, the SKU-specific 135 W value matches the rest of the 70xx line and is used on this page, with the 165 W table figure noted as a conflict the board list should arbitrate.
Socket and motherboard compatibility
The processor fits Socket 604, the 604-pin mPGA604 zero insertion force socket. As an MP part it belongs in boards that scale to four sockets and beyond, the quad and octo topology Wikipedia assigns to Paxville MP. It is not a DP part, so dual-socket-only boards follow a different qualification list even where the socket matches.
Intel stated that the 7000 sequence fits existing E8500 chipset platforms designed for dual-core operation. Board level support still needs an explicit CPU list entry for the 7020 or SL8UA plus a BIOS with its microcode. Given the TDP disagreement between sources, power regulation and cooling should be confirmed for the higher of the documented figures where the board manual is silent. The Socket vs chipset: what decides whether a CPU works guide explains the socket, chipset, and BIOS combination.
A used buyer should match the printed sSpec to the board list, verify the BIOS revision, and verify chassis airflow for a multiprocessor 135 W population before ordering.
Memory, PCIe and cooling
Memory passes through the server board, and TechPowerUp records ECC support with a dual-channel board memory bus for this SKU. Memory type, speed, rank discipline, and the capacity ceiling are set by the board and its chipset, so the server maker memory list is binding. Multiprocessor boards are strict about slot population order, and the manual sequence should be followed exactly.
A 667 MT/s front side bus links the package to the server chipset, and expansion slots hang off that chipset. There is no integrated graphics and no on-die PCIe controller on this die. Slot versions, lane behavior, and console output are therefore board documentation topics, with remote management hardware covering administration on most of these systems.
Cooling is a vendor matter at this envelope. The heatsink must be the server maker part specified for the exact board and chassis, seated in the directed airflow path the manual describes. Because one source prints 165 W for this sSpec, keeping cooling rated for at least the 135 W page value, and confirming the board list where possible, is the safe posture.
Upgrade paths
Faster same-socket options are the Intel Xeon MP 7030 Dual-Core at 2.8 GHz on an 800 MT/s bus and the 3.0 GHz pair, the Intel Xeon MP 7040 Dual-Core and the Intel Xeon MP 7041 Dual-Core, each needing its own board list entry and BIOS coverage. The 65 nm Tulsa generation is the later same-socket family, for example the Intel Xeon 7140M, where the board vendor qualifies it.
Leaving Socket 604 for any newer Xeon generation means a new board, new memory, and a new thermal design, since sockets and chipsets both change with the platform.
Frequently asked questions
What socket does the Xeon MP 7020 Dual-Core use?
Socket 604, on multiprocessor server boards whose CPU list includes the 7020 or sSpec SL8UA.
How many cores and threads does the Xeon MP 7020 Dual-Core have?
Two cores and 4 threads at 2.667 GHz. Hyper-Threading is documented for all Paxville MP models, so each core presents two logical processors.
Is the TDP 135 W or 165 W?
This page uses 135 W from the per-SKU database entry, consistent with the rest of the 70xx line. Wikipedia prints 165 W for SL8UA, which is noted here as a conflict for the board list to arbitrate.
When was the Xeon MP 7020 Dual-Core launched?
December 2005 from the per-SKU database entry. Intel announced the 7000 sequence as shipping November 1, 2005, so November dates describe the sequence launch.
Sources and verification
- List of Intel Xeon processors (NetBurst-based) (Wikipedia)
- Intel Xeon MP 7020 Dual-Core (TechPowerUp CPU database)
- Intel launches dual-core Xeon 7000 sequence (Intel press release, Nov 2005)
Facts last checked against these sources on . Page last edited on .