Intel Xeon E3-1290 socket: LGA 1155

The Intel Xeon E3-1290 uses the LGA 1155 socket. It is a 95 W quad core Sandy Bridge server part at 3.6 GHz with turbo to 4.0 GHz and ECC memory.

Socket
LGA 1155
Launched
May 2011
Cores and threads
4 and 8
Base power
95 W
Codename
Sandy Bridge
Segment
Server
Clocks
3.6 / 4.0 GHz

Intel Xeon E3-1290 specifications

Cores4
Threads8
Core architectureSandy Bridge cores on 32 nm
Clocks3.6 GHz base, 4.0 GHz turbo
Cache8 MB Intel Smart Cache (L3)
Processor base power (TDP)95 W
Manufacturing process32 nm
Memory supportDDR3-1066 and 1333, two channels, up to 32 GB, ECC supported on server boards
PCI Express20 lanes from the CPU, PCIe 2.0
Integrated graphicsNone (server part, uses board BMC video)
MultiplierLocked
ECC memorySupported (requires server board)
PackageFCLGA1155 (37.5 × 37.5 mm)

Motherboard and chipset compatibility

Intel Xeon E3-1290 needs a motherboard with a LGA 1155 socket. The table shows which chipset series accept it.

SeriesChipsetsSupport
7 seriesZ77, Z75, H77, B75, Q77, Q75Works out of the box
6 series: H61, H67, P67, Z68Z68, P67, H67, H61Works out of the box
6 series business: B65, Q65, Q67Q67, Q65, B65Works out of the box

Board makers publish a CPU support list for every model. Check it for your exact board before buying. Chipset details for LGA 1155.

LGA 1155 at a glance

TypeLGA, 1,155 contacts
Package size37.5 × 37.5 mm
IntroducedJanuary 2011
MemoryDDR3
Cooler mounting holes75 × 75 mm

Read the full LGA 1155 socket guide

What the Xeon E3-1290 is

Intel Xeon E3-1290 is a quad core Sandy Bridge server processor that Intel released in May 2011 for single socket servers. It runs at 3.6 GHz base with turbo to 4.0 GHz and includes Hyper-Threading, so 4 cores give 8 threads. Cache is 8 MB Intel Smart Cache. Power is 95 W on a 32 nm process.

The E3-1290 tops the Sandy E3 launch range on clocks. Single threaded server tasks run at the front of the 2011 pack. The chip launched on May 29, 2011 after the April wave.

There is no integrated graphics on this die, so server boards provide BMC video for management. Memory is DDR3 with ECC in two channels.

Socket and motherboard compatibility

The Xeon E3-1290 fits LGA 1155 in FCLGA1155 form. Single socket server boards with C202, C204 and C206 chipsets carry Sandy Bridge E3 parts. The board BIOS must list the exact E3-1290 string.

Desktop boards may boot the chip electrically, but ECC and BMC management need a server board. Use a server board for the intended role.

Memory, PCIe and cooling

Memory support is DDR3-1066 and 1333, two channels, up to 32 GB with ECC on server boards. ECC catches single bit errors in always on service. Capacity follows the board design.

PCI Express is 20 lanes from the CPU at PCIe 2.0 for network and storage. Server boards spend lanes on reliable I/O.

Cooling is a 95 W server heatsink with directed airflow. The CPU cooler compatibility by socket guide notes server cooling stays chassis specific.

Upgrade paths

On LGA 1155 the E3-1290 already tops the Sandy E3 range on clocks, so later steps are Ivy Bridge E3 v2 parts on updated server BIOS. Memory and storage carry over where the board lists both strings. A same socket reference at lower clocks is Intel Xeon E3-1280.

A platform move to a current server socket needs a new board and DDR4 memory. Keep the E3-1290 node for fast thread duty.

Frequently asked questions

What socket does the Intel Xeon E3-1290 use?

It uses LGA 1155 in single socket server boards.

How is the Xeon E3-1290 different from the E3-1280?

The E3-1290 runs at 3.6 GHz base with 4.0 GHz turbo. The E3-1280 runs at 3.5 GHz base with 3.9 GHz turbo.

What memory does the Xeon E3-1290 use?

DDR3-1066 and 1333 with ECC on server boards, two channels, up to 32 GB.

Does the Xeon E3-1290 have Hyper-Threading?

Yes. Four cores give 8 threads.

Sources and verification

  1. Sandy Bridge Xeon list (E3-1290 3.6 GHz turbo 4.0 8MB 95W May 2011)
  2. Sandy Bridge-E Xeon notes (E3 mostly identical to desktop, IGPU absent unless noted)

Facts last checked against these sources on . Page last edited on .