AMD Athlon XP 2100+ socket: Socket 462
The AMD Athlon XP 2100+ uses the Socket 462 socket. It is a 72 W single-core Palomino desktop part at 1733 MHz with 256 KB of L2 cache for Socket 462 DDR boards.
- Socket
- Socket 462
- Launched
- March 2002
- Cores and threads
- 1 and 1
- Default TDP
- 72 W
- Codename
- Palomino
- Segment
- Desktop
- Family
- AMD Athlon XP
- Clocks
- 1.73 GHz
AMD Athlon XP 2100+ specifications
| Cores | 1 |
|---|---|
| Threads | 1 |
| Core architecture | Palomino cores on 180 nm |
| Clocks | 1733 MHz (no turbo) |
| Cache | 256 KB L2 |
| Default TDP | 72 W |
| Manufacturing process | 180 nm |
| Memory support | DDR through the board chipset |
| Front side bus | 266 MT/s |
| PCI Express | AGP or PCI from the board chipset |
| Integrated graphics | None (board graphics where fitted) |
| Multiplier | Locked (13x) |
| Package | Socket 462 (462-pin OPGA) |
Motherboard compatibility
AMD Athlon XP 2100+ needs a motherboard with a Socket 462 socket. Chipset by chipset data for this codename is not recorded yet. See the Socket 462 chipset list and the board maker's CPU support list.
Socket 462 at a glance
| Type | PGA, 462 contacts |
|---|---|
| Package size | 49.53 × 49.53 mm |
| Introduced | June 2000 |
| Memory | DDR through the board chipset, single channel |
| Cooler mounting holes | Socket lug (clip) |
What the Athlon XP 2100+ is
The AMD Athlon XP 2100+ is a 1733 MHz single-core desktop processor from March 2002. It runs one K7 Palomino core at 1733 MHz with no turbo, so 1 core gives 1 thread. Cache is 256 KB of L2 on a 180 nm process. Power is rated at 72 W in a Socket 462 package with part number AX2100DMT3C on a 266 MT/s front side bus with a 13x multiplier at 1.75 V. The cpu_list March 2002 date matches the table March 13, 2002, and the monthly value is used here.
Palomino covers Model 6 180 nm Athlon XP parts from the 1333 MHz 1500+ to the 1733 MHz 2100+, before Thoroughbred moved the line to 130 nm in June 2002. The 2100+ tops Palomino with the highest clocks and power in the group. AMD sold it at 420 dollars in March 2002. The chip supports MMX, SSE and Enhanced 3DNow.
Large die with high voltage marks the 180 nm generation. The 72 W rating against 49.5 W on Thoroughbred 1700+ parts at lower clocks reflects the older process and 1.75 V operation. That is why Palomino towers need stronger cooling than later Thoroughbred boards at similar ratings.
Socket and motherboard compatibility
The Athlon XP 2100+ Palomino fits Socket 462 DDR boards with a 266 MT/s bus and Palomino BIOS support. It needs DDR slots with Model 6 microcode. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.
Early DDR towers with 266 MT/s chipsets are the natural match. Boards listing Palomino 2100+ accept the chip with a 72 W cooler. Thoroughbred 2000+ parts offer similar clocks at lower power where listed.
Memory, PCIe and cooling
Memory is DDR through the board chipset in a single channel, matched to the 266 MT/s bus. The CPU has no controller.
A 266 MT/s bus ties the CPU to the chipset, while AGP and PCI hang off the chipset. No PCIe lanes originate on the die. Cooling uses the socket lug clip with a 72 W heatsink. Exposed-die mounting needs centered pressure and fresh paste.
Upgrade paths
On Socket 462 the steps are Thoroughbred 2000+ and 2100+ parts at similar clocks with lower power on 130 nm. Barton 2500+ parts offer 512 KB as a cache lift. Beyond Socket 462 a move to Socket 754 needs a new board. The 2100+ lifts with the lever, so swaps need no solder work.
Frequently asked questions
What socket does the Athlon XP 2100+ use?
Socket 462, on DDR boards with Palomino support.
How many cores does the Athlon XP 2100+ have?
One core and 1 thread at 1733 MHz with 256 KB of L2 cache.
What memory works with the Athlon XP 2100+?
DDR through the board chipset, matched to the 266 MT/s bus.
Can the Athlon XP 2100+ be upgraded?
Thoroughbred parts offer similar clocks at lower power. A move to Socket 754 needs a new board.
Sources and verification
Facts last checked against these sources on . Page last edited on .