Intel Xeon Gold 6438Y+ socket: LGA 4677

The Intel Xeon Gold 6438Y+ uses LGA 4677, the 4677-contact LGA socket for Sapphire Rapids server processors. The 32-core chip at 205 W needs a server board with DDR5 to 4800 MT/s in 8 channels.

Socket
LGA 4677
Launched
January 2023
Cores and threads
32 and 64
Base power
205 W
Segment
Server
Clocks
2.0 / 4.0 GHz

Intel Xeon Gold 6438Y+ specifications

Cores32
Threads64
Core architectureSapphire Rapids-SP
Clocks2.0 GHz base, up to 4.0 GHz turbo
Cache60 MB Intel Smart Cache (L3)
Processor base power (TDP)205 W
Manufacturing processIntel 7
Memory supportUp to DDR5 4800 MT/s (4400 MT/s with 2 DIMMs per channel), 8 channels, up to 4 TB
PCI Express80 PCIe Gen5 lanes per CPU
UPI links3 at 16 GT/s
Scalability2 sockets
MultiplierLocked
PackageFCLGA4677
Cooler in the boxNone (server heatsink required)
Launch price$3141.00 Intel recommended customer price

Motherboard and chipset compatibility

Intel Xeon Gold 6438Y+ needs a motherboard with a LGA 4677 socket. The table shows which chipset series accept it.

SeriesChipsetsSupport
W790 workstationW790Works out of the box

Board makers publish a CPU support list for every model. Check it for your exact board before buying. Chipset details for LGA 4677.

LGA 4677 at a glance

TypeLGA, 4,677 contacts
Package size77.5 × 56.5 mm
Introduced2023
MemoryDDR5-4800 Registered DIMMs with ECC, 8 channels up to 4 TB on W-3500 and W-3400, 4 channels on W-2500 and W-2400
Cooler mounting holesBoard specific (workstation heatsink)

Read the full LGA 4677 socket guide

What the Xeon Gold 6438Y+ is

In the Sapphire Rapids Gold stack, the Xeon Gold 6438Y+ serves as the 32-core member of the 4th Gen Xeon Scalable family for LGA 4677 boards from January 2023. 32 cores with hyperthreading give 32 cores and 64 threads, with base at 2.0 GHz and up to 4.0 GHz turbo. The package carries 60 MB of Smart Cache. The 205 W envelope fits standard server heatsinks with front to back airflow.

DDR5 to 4800 MT/s with one DIMM per channel and 4400 MT/s with two DIMMs per channel in 8 channels with ECC feeds the cores, and matched DIMMs hold the rated speed. Eighty Gen5 lanes with Flex Bus and CXL per CPU wire NICs, accelerators and NVMe, and the lane count stays constant across most Sapphire Rapids Gold and Platinum SKUs. Three UPI links at 16 GT/s join two sockets into a coherent pair, while larger four socket and eight socket fabrics use the H class SKUs instead.

Dense virtualization, hyperconverged nodes and AI data preparation take this core count with 60 MB of shared cache, where thread density per socket reduces node count. Server boards need a C741 class chipset with the Xeon Gold 6438Y+ on the CPU support list, not W790 workstation boards. The Socket vs chipset: what decides whether a CPU works guide covers server board choice, and Intel Xeon Gold 5411N shows a nearby Xeon Gold option on the same socket.

Socket and motherboard compatibility

The 6438Y+ fits LGA 4677 on single and dual socket server boards with LGA 4677 retention and server power delivery. Board lists must name the Xeon Gold 6438Y+ suffix part for qualification. W790 workstation boards target W-series chips instead, so a server SKU will not post there even though the contact count matches.

Server chipset choice decides management and IO breadth rather than CPU fit. C741 class boards carry BMC management, multiple NICs and NVMe backplanes for this power class. A BIOS that lists Sapphire Rapids Gold and Platinum from January 2023 covers the part, while early firmware may need an update for specific stepping IDs. Check the board CPU list before mixing this SKU with other steppings in dual socket pairs.

Memory, PCIe and cooling

DDR5 to 4800 MT/s with one DIMM per channel and 4400 MT/s with two DIMMs per channel in 8 channels with ECC feeds the cores, and matched DIMMs hold the rated speed. Population with matched RDIMMs holds the rated speed, and eight channel operation needs one DIMM per channel at minimum for full bandwidth. Capacity reaches 4 TB per socket with high density DIMMs, which suits in memory work on 32 cores.

Eighty Gen5 lanes with Flex Bus and CXL per CPU wire NICs, accelerators and NVMe, and the lane count stays constant across most Sapphire Rapids Gold and Platinum SKUs. CXL memory expansion and accelerators share the same fabric on boards that wire those slots to CPU lanes. Lane bifurcation follows board firmware, so slot population rules come from the board manual.

The 205 W envelope fits standard server heatsinks with front to back airflow. The 77.5 × 56.5 mm FCLGA4677 package uses a server carrier with even mounting pressure. Paste and torque sequence follow the heatsink maker specification for 205 W parts.

Upgrade paths

On LGA 4677 the upward moves are higher core Xeon Gold parts where VM counts grow, or adding a second Xeon Gold 6438Y+ socket where boards allow two socket operation. For this 32-core SKU, memory growth to full eight channel population and NIC additions often help more than clocks. Moving from DDR5 to 4800 MT/s in 8 channels to fully populated channels lifts bandwidth without a CPU swap.

Outside this SKU, Intel Xeon Gold 5411N (Xeon Gold 5411N) on LGA 4677 trims or adds cores for lighter or denser loads. Platinum parts add UPI breadth for four socket and eight socket fabrics, while Silver parts cut cost for single purpose hosts. A move to another socket needs a new board and memory plan, so socket local growth comes first.

Frequently asked questions

What socket does the Xeon Gold 6438Y+ use?

LGA 4677 on single and dual socket server boards with the part on the CPU support list.

What memory does the Xeon Gold 6438Y+ need?

Up to DDR5 4800 MT/s (4400 MT/s with 2 DIMMs per channel), 8 channels, up to 4 TB.

What is the launch price of the Xeon Gold 6438Y+?

$3141.00 Intel recommended customer price.

How many UPI links does the Xeon Gold 6438Y+ have?

3 at 16 GT/s for dual socket pairing.

Sources and verification

  1. Intel Xeon Gold 6438Y+ specifications (Intel ARK)
  2. Intel Xeon Gold 6438Y+ specs (TechPowerUp CPU database)

Facts last checked against these sources on . Page last edited on .