Intel Pentium M 1.70 socket: Socket 479
The Intel Pentium M 1.70 uses the Socket 479 socket. It is a 24.5 W single-core Banias mobile part at 1700 MHz with 1 MB of L2 cache for top Centrino laptops of mid 2003.
- Socket
- Socket 479
- Launched
- June 2, 2003
- Cores and threads
- 1 and 1
- Base power
- 24.5 W
- Codename
- Banias
- Segment
- Mobile (socketed)
- Family
- Intel Pentium M
- Clocks
- 1.7 GHz
Intel Pentium M 1.70 specifications
| Cores | 1 |
|---|---|
| Threads | 1 |
| Core architecture | Banias (P6) |
| Clocks | 1700 MHz base, no turbo |
| Cache | 64 KB L1, 1 MB full-speed L2 |
| Processor base power (TDP) | 24.5 W |
| Manufacturing process | 130 nm |
| Memory support | DDR through the board chipset |
| Front side bus | 400 MT/s |
| Package | Socket 479 (micro FCPGA, 479-pin socket, 478 contacts used) |
| Multiplier | Locked (17x) |
| Integrated graphics | None |
Motherboard compatibility
Intel Pentium M 1.70 needs a motherboard with a Socket 479 socket. Chipset by chipset data for this codename is not recorded yet. See the Socket 479 chipset list and the board maker's CPU support list.
Socket 479 at a glance
| Type | PGA, 479 contacts |
|---|---|
| Package size | n/a |
| Introduced | 2003 |
| Memory | DDR or DDR2 through the board chipset |
| Cooler mounting holes | Board specific (vendor heatsink) |
What the Pentium M 1.70 is
The Intel Pentium M 1.70 is a 1700 MHz single-core mobile processor from June 2003. It runs one P6 Banias core at 1700 MHz with no turbo, so 1 core gives 1 thread. Cache is 1 MB of L2 with 64 KB of L1 on a 130 nm process. Power is rated at 24.5 W in a Socket 479 micro FCPGA package on a 400 MT/s front side bus with a 17x multiplier.
A mid-year speed lift over the March launch set makes the 1.70 the fastest Banias part, which is why it headed premium Centrino configurations in summer 2003. Intel launched the 1.70 on June 2, 2003 after the 1.30 to 1.60 launch set. The chip supports MMX, SSE, SSE2 and Enhanced SpeedStep.
Peak Banias clocks with a 24.5 W envelope suit top Centrino laptops with DDR memory and high-resolution screens. The 17x ratio stretches the 400 MT/s bus to its Banias limit. That is why the 1.70 shipped in flagship thin-and-light models.
Socket and motherboard compatibility
The 1.70 fits Socket 479 flagship laptops with Banias support. It needs a 479-pin board with a 400 MT/s bus and a BIOS that lists Pentium M 1.70. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.
Flagship DDR laptops are the natural match. Boards listing Pentium M 1.70 accept the chip with a 24.5 W pipe. Early March BIOS revisions with no 1.70 string need an update before the swap.
Memory, PCIe and cooling
Memory is DDR through the board chipset, matched to the board slots. The CPU has no memory controller, so the chipset sets the type and speed. Flagship 855 boards commonly run DDR333 pairs for 1700 MHz Banias parts.
A 400 MT/s front side bus ties the CPU to the chipset, while AGP and PCI hang off the chipset. No PCIe lanes originate on the die. Cooling uses the laptop heat pipe for the exact chassis, rated for 24.5 W with fan tables for the 1700 MHz point.
Upgrade paths
On the same socket, a move to a Dothan Pentium M 735 at 1700 MHz keeps the 1700 MHz mark while doubling cache to 2 MB on 90 nm at 21 W when the support list names Dothan. The Dothan swap cuts power while adding cache, so battery life often improves. A Pentium M 1.60 such as Intel Pentium M 1.60 drops 100 MHz at equal power.
A move to Core Duo Yonah needs Socket M with a new board. The Socket 479 page lists the Banias to Yonah path for planning.
Frequently asked questions
What socket does the Pentium M 1.70 use?
Socket 479 in a micro FCPGA package. It is a 24.5 W Banias mobile part at 1700 MHz.
What memory does the 1.70 use?
DDR through the board chipset, commonly DDR333 pairs on flagship 855 boards.
What is the upgrade path from the 1.70?
A Dothan Pentium M 735 at the same 1700 MHz with 2 MB of cache at 21 W when the BIOS lists Dothan. A move to Core Duo needs Socket M.
Sources and verification
Facts last checked against these sources on . Page last edited on .